diff -r 940bece63319 ChangeLog.ggx
--- a/ChangeLog.ggx	Thu Mar 20 17:39:37 2008 -0700
+++ b/ChangeLog.ggx	Fri Mar 21 06:50:49 2008 -0700
@@ -1,3 +1,7 @@ 2008-02-11  Anthony Green  <green@spinda
+2008-03-20  Anthony Green  <green@spindazzle.org>
+
+	* configure.ac: Don't build libssp target library.
+
 2008-02-11  Anthony Green  <green@spindazzle.org>
 
 	* config.sub: Add gcore support.
diff -r 940bece63319 gcc/ChangeLog.ggx
--- a/gcc/ChangeLog.ggx	Thu Mar 20 17:39:37 2008 -0700
+++ b/gcc/ChangeLog.ggx	Fri Mar 21 06:50:49 2008 -0700
@@ -1,3 +1,8 @@ 2008-03-19  Anthony Green  <green@spinda
+2008-03-20  Anthony Green  <green@spindazzle.org>
+
+	* config/ggx/ggx.md: (movqi, *movqi, movhi, *movhi): New patterns.
+	(jmp): Implement.
+
 2008-03-19  Anthony Green  <green@spindazzle.org>
 
 	* config/ggx/ggx.md (loadsi_offset, storesi_offset): New patterns.
diff -r 940bece63319 gcc/config/ggx/ggx.md
--- a/gcc/config/ggx/ggx.md	Thu Mar 20 17:39:37 2008 -0700
+++ b/gcc/config/ggx/ggx.md	Fri Mar 21 06:50:49 2008 -0700
@@ -103,10 +103,34 @@
    ld.l   %0, %1
    lda.l  %0, %1")
 
+(define_expand "movqi"
+  [(set (match_operand:QI 0 "general_operand" "")
+	(match_operand:QI 1 "general_operand" ""))]
+  ""
+  "
+{
+  /* If this is a store, force the value into a register.  */
+  if (GET_CODE (operands[0]) == MEM)
+    operands[1] = force_reg (QImode, operands[1]);
+}")
+
+(define_insn "*movqi"
+  [(set (match_operand:QI 0 "general_operand" "=r,r,W,m,r,r")
+	(match_operand:QI 1 "general_operand" "r,i,r,r,W,m"))]
+  "register_operand (operands[0], QImode)
+   || register_operand (operands[1], QImode)"
+  "@
+   mov    %0, %1
+   ldi.b  %0, %1
+   st.b   %0, %1
+   sta.b  %0, %1
+   ld.b   %0, %1
+   lda.b  %0, %1")
+
 (define_expand "movhi"
-   [(set (match_operand:HI 0 "general_operand" "")
- 	(match_operand:HI 1 "general_operand" ""))]
-   ""
+  [(set (match_operand:HI 0 "general_operand" "")
+	(match_operand:HI 1 "general_operand" ""))]
+  ""
   "
 {
   /* If this is a store, force the value into a register.  */
@@ -115,11 +139,17 @@
 }")
 
 (define_insn "*movhi"
-  [(set (match_operand:HI 0 "general_operand" "=r")
-	(match_operand:HI 1 "general_operand" "r"))]
+  [(set (match_operand:HI 0 "general_operand" "=r,r,W,m,r,r")
+	(match_operand:HI 1 "general_operand" "r,i,r,r,W,m"))]
   "register_operand (operands[0], HImode)
    || register_operand (operands[1], HImode)"
-  "mov   %0, %1")
+  "@
+   mov    %0, %1
+   ldi.s  %0, %1
+   st.s   %0, %1
+   sta.s  %0, %1
+   ld.s   %0, %1
+   lda.s  %0, %1")
 
 ;; -------------------------------------------------------------------------
 ;; Compare instructions
@@ -282,8 +312,7 @@
 (define_insn "indirect_jump"
   [(set (pc) (match_operand:SI 0 "nonimmediate_operand" "r"))]
   ""
-  "*
-  abort ();")
+  "jmp    %0")
 
 (define_insn "jump"
   [(set (pc)